Claude
a8a3d8f44f
perf: add x86_64 and ARM64 inline ASM for field multiply
Platform-specific inline assembly for fe_mul:
x86_64: Uses MULQ instruction for 64x64->128 products. Row-based
schoolbook with ADC carry chain. Reduction uses MULQ for hi[i]*C.
Eliminates redundant register moves that __int128 compilation generates.
ARM64: Uses MUL+UMULH instruction pairs for 64x64->128 products.
First row in ASM with ADDS/ADC carry chain, remaining rows use
__int128 (which ARM64 gcc compiles well). Reduction in __int128.
fe_mul: 20.1ns → 17.2ns (14% faster on x86_64)
gej_double: 242ns → 224ns (7.4% faster)
verifyFast: 37.2µs → 36.5µs (27,397 ops/s)
signXOnly: 19.2µs → 18.5µs (54,054 ops/s)
https://claude.ai/code/session_011KVZhDcV2G7idNWEBz12GY